1 ? fn8227.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2006. all rights reserved all other trademarks mentioned are the property of their respective owners. isl88031 quintuple voltage monitor the isl88031 is a quintuple voltage-monitoring supervisor combining competitive reset threshold accuracy and low power consumption. this devic e combines popular functions such as power on reset, undervoltage supply supervision, reset signaling and manual reset. monitoring up to five different voltages in a small 8 ld msop package, the isl88031 devices can help to lower system cost, reduce board space requirements, and increase the reliability of multi-voltage systems. low v dd detection circuitry protects the user?s system from low voltage conditions, resetting the system when v dd or any of the other monitored power supply voltages fall below their respective minimum voltage thresholds. the reset signal remains asserted until all of these voltages return to proper operating levels and stabilize. with two of the five voltage monitors being preset for common supplies, users can adju st the threshold voltages of the third, fourth, and fifth voltage monitors in order to meet specific system level requirements. features ? quintuple voltage monitoring ? fixed-voltage options allow precise monitoring of +5.0v, +3.3v, +3.0v, +2.5v a nd +1.8v power supplies ? adjustable voltage inputs monitor voltages > 0.6v ? 120ms nominal reset pulse width ? manual reset capability ? reset signals valid down to v dd = 1v ? accurate 1.8% voltage threshold ? immune to power-supply transients ? low 19a maximum supply current at 5v ? pb-free plus anneal available (rohs compliant) applications ? telecom & datacom systems ? routers & servers ? access concentrators ? cable/satellite applications ? desktop & notebook computer systems ? data storage equipment ? set-top boxes ? industrial equipment ? multi-voltage systems pinout isl88031 (8 ld msop) top view 1 2 3 4 8 7 6 5 v dd v2mon gnd rst v5mon v4mon v3mon mr data sheet march 31, 2006
2 fn8227.0 march 31, 2006 functional block diagram ordering information part number (note 1, 2) part marking v th1 v th2 temp range (c) package (pb-free) pkg. dwg. # isl88031iu8hfz ama 4.64v 3.09v -40 to +85 8 ld msop m8.118 isl88031iu8hez anz 4.64v 2.92v -40 to +85 8 ld msop m8.118 isl88031iu8hcz apr 4.64v 2.32v -40 to +85 8 ld msop m8.118 isl88031iu8haz aps 4.64v 1.69v -40 to +85 8 ld msop m8.118 ISL88031IU8ECZ apt 2.90v 2.32v -40 to +85 8 ld msop m8.118 isl88031iu8eaz apz 2.90v 1.69v -40 to +85 8 ld msop m8.118 notes: 1. add ?-tk? suffix for tape and reel. 2. intersil pb-free plus anneal products empl oy special pb-free material sets; molding compounds/die attach materials and 100% m atte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free p roducts are msl classified at pb-free peak reflow tem peratures that meet or exceed the pb-free requirements of ipc/jedec j std-020. pin descriptions isl88031 name function 1mr active-low open drain manual reset i nput with internal pull-up resistor 2v dd chip bias input and integrated preset under voltage monitor 3 v2mon second preset under-voltage monitor input 4 gnd ground 5 v3mon adjustable third under-voltage monitor input 6 v4mon adjustable fourth under-voltage monitor input 7 v5mon adjustable fifth under-voltage monitor input 8rst active-low open drain reset output v ref v dd por gnd v ref v3mon pb rst v ref v2mon v ref v5mon v ref v4mon mr isl88031
3 fn8227.0 march 31, 2006 absolute maximum rati ngs thermal information temperature under bias . . . . . . . . . . . . . . . . . . . . . .-40c to +125c voltage on any pin with respect to gnd . . . . . . . . . . . . -1.0v to +7v d.c. output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ma recommended operating conditions operating temperature range (industrial). . . . . . . . . .-40c to +85c storage temperature range . . . . . . . . . . . . . . . . . . .-65c to +150c lead temperature (soldering, 10s). . . . . . . . . . . . . . . . . . . . . . 300c thermal resistance (typical, note 3) ja (c/w) msop package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 3. ja is measured with the component mounted on a high effective therma l conductivity test board in free air. see tech brief tb379 f or details. electrical specifications over the recommended operating conditi ons unless otherwise specified. symbol parameter test conditions min typ max units v dd supply voltage range 2.0 5.5 v i dd1 v dd supply current v dd = 5.0v 14 19 a i dd2 v2mon input current v2mon = 3.3v 5.5 7 a i dda v3, v4, v5mon input current v3, v4, v5mon = 1.0v 19 100 na voltage thresholds v th1 fixed voltage trip point for v dd isl88031iu8 h xz 4.551 4.634 4.717 v isl88031iu8 e xz 2.814 2.866 2.917 v v th1hyst hysteresis of v th1 v th1 = 4.64v 46 mv v th1 = 2.90v 29 mv v th2 fixed voltage trip point for v2mon isl88031iu8xfz 3.022 3.078 3.133 v isl88031iu8xez 2.901 2.955 3.008 v isl88031iu8xcz 2.291 2.333 2.375 v isl88031iu8xaz 1.652 1.683 1.713 v v th2hyst hysteresis of v th2 v th2 = 3.09v 37 mv v th2 = 2.92v 29 mv v th2 = 2.32v 23 mv v th2 = 1.69v 17 mv v ref v3mon adj. reset threshold voltage v th for v3mon 0.589 0.600 0.611 v v4mon, v5mon adj. reset threshold voltage v th for v4mon, v5mon 0.585 0.598 0.611 v v refhyst hysteresis voltage 3mv reset v ol reset output voltage low v dd 3.3v, sinking 2.5ma 0.05 0.40 v v dd < 3.3v, sinking 1.5ma 0.05 0.40 v t rpd v th to reset asserted delay 6s t por por timeout delay 80 120 180 ms c load load capacitance on reset pins 5 pf isl88031
4 fn8227.0 march 31, 2006 pin description rst the rst output is an open drain ou tput which is asserted low whenever 1. the device is initially powered up to 1v or 2. v dd , v2mon, v3mon, v4mon, or v5mon fall below their minimum voltage sense level. mr the mr input is an active low debounced input to which a user can connect a push-button to add manual reset capability or use a signal to pull low. mr has an internal pull- up resistor. v dd the v dd pin is the ic power supply terminal. the voltage at this pin is compared against an internal factory-programmed voltage trip point, v th1 . rst is first asserted low when the device is initially powered and v dd < 1 v and then at any time thereafter when v dd falls below v th1 . the device is designed with hysteresis to help prevent chattering due to noise and is immune to brief power-supply transients. v2mon the v2mon input is the second preset monitored voltage that causes the rst output to go low when the voltage on v2mon falls below v th2 . v3mon, v4mon, and v5mon the vxmon inputs provide monitoring and uv compliance of three additional voltages through resistor dividers. a reset is issued on the isl88031 if the voltage on any vxmon falls below the internal v ref of 0.6v. principles of operation the isl88031 device provide those functions needed for monitoring critical voltages su ch as power-supply and battery functions in microprocessor system s. it provides such features as power on reset control, supply voltage supervision, and manual reset assertion. the inte gration of all these features along with competitive reset threshold accuracy and low power consumption make the isl88031 device suitable for a wide variety of applications needing multi-voltage monitoring. see figure 1 for typical application diagram. low voltage monitoring during normal operation, the isl88031 monitors the voltage levels of v dd , v2mon, v3mon, v4mon, and v5mon. if the voltage on any of these five inputs falls below their respective voltage trip points, a reset is asserted (rst = low) to prevent the microprocessor from operat ing during a power failure or brownout condition. this reset signal remains low until the voltages exceeds the voltage threshold settings for the reset time delay period t por . the isl88031 allows users to customize the minimum voltage sense level for three of the five monitored voltages. for example, the user can adjust the voltage input trip point (v trip ) for v3mon, v4mon and v5mon inputs. to do this, connect an external resistor divider network to the vxmon pin in order to set the trip point to some other voltage above 600mv according to the following formula: v trip = 0.6v x (r1 + r2) / r2 manual reset v mrl mr input voltage low 0.8 v v mrh mr input voltage high v dd -0.6 v t mr mr minimum pulse width 550 ns r pu internal pull-up resistor 10 k ? electrical specifications over the recommended operating conditi ons unless otherwise specified. (continued) symbol parameter test conditions min typ max units figure 1. typical application diagram v3mon mr pb gnd rst reset v2mon v dd isl88031 signal v4mon v5mon isl88031
5 fn8227.0 march 31, 2006 power on reset (por) applying power to the isl88031 activates a por circuit which makes the reset pin(s) active (i.e. rst goes high while rst goes low). these signals provide several benefits: ? it prevents the system microprocessor from starting to operate with insufficient voltage. ? it prevents the processor from operating prior to stabilization of the oscillator. ? it ensures that the monitored device is held out of operation until internal registers are properly loaded. ? it allows time for an fpga to download its configuration prior to initialization of the circuit. the reset signal remains active until v dd rises above the minimum voltage sense level for time period t por . this ensures that the supply voltage has stabilized to sufficient operating levels. manual reset the manual-reset input (mr ) allows the user to trigger a reset by using a push-button switch or by signaling the input low. the mr input is an active low debounced input. reset is asserted if the mr pin is pulled low to less than 100mv for the minimum mr pulse width or longer while the push-button is closed. after mr is released, the reset output remains asserted low for t por (200ms) and then is released. figures 2 and 3 illustrate the operation isl88031?s operation. figure 4 shows the isl88031eval, the evaluation platform for this family of voltage monitors. figures 5 and 6 illustrate rst output response times. the isl88031eval1 and applications the isl88031eval1 supports all variants of the isl88031 devices, enabling evaluation of basic functional operation and common application implementations. figure 4 illustrates the isl88031eval1 in schematic and photographic forms. the isl88031eval1 has two isolated circuits, the left circuit is populated with the isl88031iu8hfz (v dd v th1 = 4.64v, v2mon v th2 = 3.08v). the right circuit is unpopulated for the user to customize to provide a specific voltage monitoring solution with the accompanying loose packed variants. with adequate bias on the two preset and the three adjustable monitor inputs the rst output will release to pull high indicating that all supplies are compliant for a minimum of t por . for the isl88031eval1 as shipped the v dd and v2mon nominal thresholds are as previously noted with the voltage thresholds being monitored by v3mon, v4mon and v5mon being nominally 1.990v, 1.44v and 0.95v respectively. special application considerations using good decoupling practices on bias and other monitoring inputs will prevent transients (i.e. due to switching noises and short duration droops in the supply voltage) from causing unwanted resets. although the internal isl88031 threshold references are guaranteed over the full temp range accuracy errors due to external component tolerances and distribution looses will occur. high tolerance resistors and layout for extreme accuracy and critical performance must be considered. v dd / v2mon mr rst t por v th1 / 2 1v t por t por >t mr t rpd figure 2. power supply monitoring diagram >t md isl88031
6 fn8227.0 march 31, 2006 vmon rst v th t por t rpd figure 3. voltage monitoring diagram figure 4. isl88031eval1 schematic and photograph figure 5. isl88031 t por 20ms/div 5v 3.3v 1.5v 2.1v 1v rst 5v/div t por = 107ms figure 6. isl88031 t rpd 20s/div 5v 3.3v 2.1v 1.5v 1v rst 5v/div t rpd = 7.5s isl88031
7 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn8227.0 march 31, 2006 isl88031 mini small outline plastic packages (msop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-187ba. 2. dimensioning and tolerancing per ansi y14.5m - 1994. 3. dimension ?d? does not include mo ld flash, protrusions or gate burrs and are measured at datum plane. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions and are measured at datum plane. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. formed leads shall be planar wi th respect to one another within 0.10mm (0.004) at seating plane. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are sh own for reference only. 9. dimension ?b? does not inclu de dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. datums and to be determined at datum plane . 11. controlling dimension: millimeter. converted inch dimen- sions are for reference only. l 0.25 (0.010) l1 r1 r 4x 4x gauge plane seating plane e e1 n 12 top view index area -c- -b- 0.20 (0.008) a b c seating plane 0.20 (0.008) c 0.10 (0.004) c -a- -h- side view b e d a a1 a2 -b- end view 0.20 (0.008) c d e 1 c l c a - h - -a - - b - - h - m8.118 (jedec mo-187aa) 8 lead mini small outline plastic package symbol inches millimeters notes min max min max a 0.037 0.043 0.94 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.030 0.037 0.75 0.95 - b 0.010 0.014 0.25 0.36 9 c 0.004 0.008 0.09 0.20 - d 0.116 0.120 2.95 3.05 3 e1 0.116 0.120 2.95 3.05 4 e 0.026 bsc 0.65 bsc - e 0.187 0.199 4.75 5.05 - l 0.016 0.028 0.40 0.70 6 l1 0.037 ref 0.95 ref - n8 87 r 0.003 - 0.07 - - r1 0.003 - 0.07 - - 05 o 15 o 5 o 15 o - 0 o 6 o 0 o 6 o - rev. 2 01/03
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